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AMD Ryzen 9000 Inter-Core Latency Issues Fixed: Performance Boosted by up to 58%!

19 September, 2024 - 4:11AM
AMD Ryzen 9000 Inter-Core Latency Issues Fixed: Performance Boosted by up to 58%!
Credit: pcgamesn.com

AMD has seemingly addressed the inter-core latency issues for its Zen 5 "Ryzen 9000" CPUs, with core-to-core Latencies seeing big drops & also leading to extra performance. A few weeks ago, it was reported that AMD was working on a patch to improve the inter-core or core-to-core Latencies for its newly launched Ryzen 9000 "Zen 5" CPUs since various tech outlets discovered that the Latencies weren't optimal with up to 180-200ns Latencies when two cores from different CCDs communicated with one another. This led to sub-optimal performance & far worse results than what were seen on the Ryzen 7000 "Zen 4" CPUs.

It looks like AMD has patched this intercommunication between the cores and CCDs in its latest AGESA 1.2.0.2 BIOS update. ASUS announced the first roll of this particular BIOS & currently rolls out across a range of X670E, B650E, and B650 motherboards. This means that PC users who are running any of the updated motherboards with the Ryzen 9000 chips can leverage the new BIOS and see noticeable gains.

Anandtech Forum member, Det0x, managed to update his ASUS ROG Crosshair X670E Gene motherboard with the latest BIOS and posted results comparing the previous BIOS to the latest one using the CapFrameX core-to-core latency tool. The results are quite impressive. With the older BIOS, the user saw an average latency of 180ns between the CCDs and around 18-20ns when the cores communicated on the same CCD.

With the new BIOS, the average latency drops down by 58% to 75ns when communicating across CCDs and the inter-CCD latency remains the same at 18-20ns.

Now Inter-core Latencies shouldn't impact overall performance a lot since AMD's scheduler mostly leverages the single fastest CCD for gaming applications but in multi-threaded applications, it looks like the uplifts from this AGESA 1.2.0.2 BIOS fix are quite substantial.

Users are reporting that they are getting up to 400-600 points improvement in Cinebench R23. A few users who own the Ryzen 9 9950X also report that both CPU-z and 3DMark CPU benchmarks have seen noticeable uplifts and the best part is that the BIOS runs flawlessly without issues.

Some interesting information was also shared by the author of the Y-Cruncher benchmark who states that the latency issues were due to a change in the tuning parameters for Zen 5. Changes were made as they were showing results in the workloads tested by the engineering team but in synthetic benchmarks, they showcased bad results which is why AMD is now reversing its decision and rolling out this new patch.

The author was surprised that the patch rolled out this fast as the architects said it could take a while to get it out due to validation but it looks like ASUS has rolled out the update and it works as intended to resolve the inter-core latencies.

Overall, this is great news for AMD Ryzen 9000 "Zen 5" CPU owners and the red team in general. Other manufacturers are expected to roll out their respective AGESA 1.2.0.2 BIOS updates later this month so we can see more users getting updated to the new firmware for a smoother and stable experience with Zen 5 chips. The BIOS will also include the new "105W TDP" mode for the AMD Ryzen 7 9700X and Ryzen 5 9600X CPUs.

AMD Ryzen 9000 launched with unexpectedly high cross-CCD latency on the dual-CCD models — Ryzen 9 9900X and Ryzen 9 9950X. However, AMD has now rectified the issue with a new AGESA microcode update that cuts the Ryzen 9 9900X and Ryzen 9 9950X's cross-CCD latency in half. User domdtxdissar on the Overclock forums discovered that AGESA microcode update 1.2.0.2 improves performance and cross-CCD latency from 180 ns to 75 ns.

The new microcode update lowers Ryzen 9000's cross-CCD latency to almost identical latencies as the previous generation Ryzen 9 7950X and Ryzen 9 7900X. It is unknown how precisely this change will improve performance, but the Overclock forum user reported that it does improve performance in some form. Inevitably, this change will enhance the performance of latency-sensitive applications that take advantage of multiple CPU cores on Ryzen 9000 chips with a dual-CCD configuration.

This change will most likely not affect gaming because AMD has implemented the same scheduling driver on its Ryzen 7950X3D and 7900X3D chips to its Ryzen 9 9950X and 9900X CPUs. This scheduler will prevent games from utilizing both CCDs simultaneously to maximize performance and minimize system latency.

Multiple outlets discovered Zen 5's oddly long cross-CCD latency when the Ryzen 9 9950X and 9900X first launched. Sister site AnandTech was entirely surprised when it found significantly higher multi-CCD latencies than Zen 4, noting that nothing changed in the architecture to warrant such behavior—Ryzen 9000 uses the same IOD and Infinity Fabric configuration as Ryzen 7000.

However, these latency changes were not created without cause. According to Y-Cruncher author Alexander Yee (sourced from Reddit), one of AMD's architects revealed that the high latency regression in Zen 5 resulted from new tuning parameters they implemented to help boost performance in workloads the company was testing against. The only problem with AMD's tuning was that it did not reportedly account for synthetic benchmarks, which created the high core-to-core latencies seen on latency-sensitive benchmarks.

Zen 5's cross-CCD latency optimizations also reportedly took a long time to develop due to testing and validation, which is why we only see them now. Thankfully, it appears AMD's latency problems were mostly related to synthetic benchmarks, so there's a good chance we won't see significant performance variance with this new AGESA update in regular multi-threaded workloads.

Some users have observed significant latency between cores in the Ryzen 9000 series processors with dual-CCD. Before the release of AGESA 1.2.0.1, cross-CCD core-to-core latency was measured at approximately 200ns, marking a substantial increase compared to the previous generation of Ryzen CPUs. However, the new AGESA firmware update reduces latency to double-digit figures.

Core-to-core latency results are interesting in some reviews of the Ryzen 9000 series processors using a BIOS with AGESA 1.2.0.1. When going from one core to another within the same CCD, latency rarely exceeds 25ns. However, when moving from one core to another in a different CCD, latency shoots up 200ns.

Previously, Geekerwan stated that AMD would fix this in an upcoming firmware, but it wasn't clear when that would happen. As it seems, it's already here. Some motherboard manufacturers have already launched a beta BIOS with AGESA 1.2.0.2 firmware for their 600-series motherboards. Despite its unofficial status, enthusiasts who flashed this firmware have reported a notable improvement in core-to-core latency on the Overclock.net forum (via HXL).

Data from “domdtxdissar” using the CapFrameX core-to-core latency tool indicates a reduction to 75 ns at peak. This data was gathered using the Ryzen 9 9950X and the Asus ROG Crosshair X670E Gene motherboard. However, it's important to note that results may vary across different Ryzen SKUs and motherboards. For example, HardwareLuxx also tested the beta BIOS with the AGESA 1.2.0.2 firmware, reporting a decrease in core latencies from 200 to 95ns.

AMD's Zen processors have always exhibited some form of latency-related issues due to the way the CPUs are designed. The CCX (CPU Complex) or CCD (Core Compute Die) typically lead to higher communication latencies between them as a result of AMD's Infinity Fabric interconnect. This is also the reason why the company typically recommends higher speed and lower latency memories with Zen processors so as to get the best system performance possible.

However, as AnandTech found out during its review of the Ryzen 9950X, the new Zen 5 parts are seeing very high latencies, double that of Zen 4 (Ryzen 7000 series), especially the inter-CCD latencies. AnandTech noted:

Compared to the Ryzen 9 7950X, we are seeing a slight increase in latencies within a single CCX. The SMT "advantage", where two logical cores sharing a single physical core have a lower latency, appears to be gone. Instead, latencies are consistently around 20ns from any logical core to any other logical core within a single CCX. That average is slightly up from 18ns on the 7950X, though it's not clear what the chief contributing factor is.

More significantly – and worryingly so – are the inter-CCD latencies. That is, the latency to go from a core on one CCD to a core on the other CCD. AMD's multi-CCD Ryzen designs have always taken a penalty here, as communicating between different CCDs means taking a long trek through AMD's Infinity Fabric to the IOD and back out to the other CCD. But the inter-CCD latencies are much higher here than we were expecting.

For reference, on the Ryzen 9 7950X, going to another CCD is around 76ns. But in Ryzen 9 9950X, we're seeing an average latency of 180ns, over twice the cost of the previous generation of Ryzen.

However, this latency problem appears to have been fixed with a new AGESA (AMD Generic Encapsulated Software Architecture) firmware update. Members of the Overclock.net and AnandTech forums tested the core-to-core latency of the Ryzen 9000 series CPUs using CapFrameX's MircroBenchX tool.

With the new AGESA 1.2.0.2 BIOS, the Ryzen 9950X showed a latency of around ~75 ns whereas with a previous firmware version, AGESA 1.2.0.1A, the number is around ~180 ns, indicating an approximate 58% reduction, which is statistically very significant. (This AGESA version is different from the one that increased the TDP.)

As for real-world improvements, a user claimed they found that their Cinebench R23 score went up slightly.

Y-cruncher developer added to the discussion that AMD was apparently aware of these performance regressions and it was a consequence of a conscious effort from AMD. However, the change is being reverted:

.. One of the lead architects told me that the latency regression was because they changed a bunch of tuning parameters for Zen5. It helped whatever workloads they were testing against, which is why they did it. But now that the reviews are out, they realized that the change looked really bad for synthetics. So they were going to roll it back.

In case you have not been following, AMD's Ryzen 9000 series processors did not impress reviewers all that much. And there have been some legit performance-related bugs in the chip and Windows 11 itself may have to share some of that blame too.

This significant decrease suggests that the update effectively addresses the inter-core communication latency issue. While these results are promising, they may vary with different CPU models and motherboard configurations. HardwareLuxx, another reputable source, reported similar findings, noting that core latencies decreased from approximately 200 nanoseconds to 95 nanoseconds after applying the AGESA 1.2.0.2 update. The consistency of these results across multiple sources adds credibility to the findings.

In addition to reduced latency, some synthetic benchmarks like Cinebench R23 have shown performance improvements of around 1%, translating to an increase of roughly 400 to 600 points in multi-core tests. However, the primary benefit of the update appears to be the reduction in inter-core latency rather than significant gains in raw computational performance.

There is ongoing discussion within the community regarding whether the previously observed high inter-core latency was due to an actual hardware or firmware issue or if it was a measurement artifact caused by the tools used. Some speculate that AMD may have adjusted parameters within the benchmarks to provide more accurate latency readings, suggesting that the update involves tuning rather than a direct fix to the hardware or firmware.

Motherboard manufacturers like ASUS have begun rolling out BIOS updates incorporating the new AGESA version. For instance, ASUS released BIOS version 2401 for its 600-series motherboards, which includes AGESA 1.2.0.2. As these BIOS updates become more widely available, more users will have the opportunity to test and observe the effects of reduced inter-core latency.

AMD’s Ryzen 9000 series processors faced criticism when released due to relatively high inter-core latency compared to their predecessors. This latency, measured at around 180 nanoseconds, negatively impacted performance in certain workloads. However, a recent firmware update, first introduced by ASUS has brought significant improvements.

The release of AGESA 1.2.0.2 for 600-series motherboards has dramatically reduced the latency to around 75 nanoseconds. Early testing has confirmed this substantial reduction, which is likely to translate into performance gains for users.

While the exact nature of the issue still remains unclear, it appears that AMD has addressed a measurement issue rather than a fundamental hardware problem. This means that the reported latency reduction is primarily due to software optimizations and tuning.

The impact of this latency reduction on real-world performance is still being evaluated. While benchmarks like Cinebench R23 have shown a slight improvement of around 1%, the full extent of the benefits will become apparent as reviewers conduct more testing.

The timing of this update is particularly interesting, given that Intel is set to unveil its Core Ultra 200K series processors, otherwise known as 15th Gen or Arrow Lake. The improved inter-core latency of the Ryzen 9000 series could provide a slightly more competitive edge, especially in applications that heavily rely on multi-core performance. As reviewers continue to assess the Ryzen 9000 series with the new AGESA firmware, we can expect to see a clearer picture of its overall performance and capabilities.

AMD Ryzen 9000 Inter-Core Latency Issues Fixed: Performance Boosted by up to 58%!
Credit: wccftech.com
Tags:
Ryzen AMD AGESA CPU Intel Core BIOS AMD Ryzen 9000 AGESA Latency performance BIOS
Diego Fernandez
Diego Fernandez

Technology Editor

Editing tech news for a tech-savvy audience.